comp_d_ex4_outputToggleVcompVsHalfVcc.c

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//******************************************************************************
// MSP430FR57xx Demo - COMPD Toggle from LPM4; CompD in LPM4
//      Vcompare is compared against the Vcc*1/2
//
// Description: Use CompB and shared reference to determine if input 'Vcompare'
//    is high of low.  When Vcompare exceeds Vcc*1/2 CDOUT goes high and when
//    Vcompare is less than Vcc*1/2 then CDOUT goes low.
//    P3.5/CDOUT is connected internally to an LED; it will toggle accordingly.
//
//                 MSP430FR5739
//             ------------------
//         /|\|                  |
//          | |                  |
//          --|RST      P1.2/CD2 |<--Vcompare
//            |                  |
//            |        P3.5/CDOUT|----> 'high'(Vcompare>Vcc*1/2); 'low'(Vcompare<Vcc*1/2)
//            |                  |  |
//            |                  |  | LED 'ON'(Vcompare>Vcc*1/2); 'OFF'(Vcompare<Vcc*1/2)
//            |                  |
//
//******************************************************************************
#include "driverlib.h"
 
void main(void)
{
  //Stop WDT
  WDT_A_hold(WDT_A_BASE);
 
    //Set P3.5 as Ternary Module Function Output.
    /*
    * Select Port 3
    * Set Pin 5 to output Ternary Module Function, (CBOUT).
    */
    GPIO_setAsPeripheralModuleFunctionOutputPin(
        GPIO_PORT_P3,
        GPIO_PIN5,
        GPIO_TERNARY_MODULE_FUNCTION
    );
 
  //Initialize the Comparator D module
    /* Base Address of Comparator D,
     * Pin CD2 to Positive(+) Terminal,
     * Reference Voltage to Negative(-) Terminal,
     * Normal Power Mode,
     * Output Filter On with minimal delay,
     * Non-Inverted Output Polarity
     */
    Comp_D_initParam param = {0};
    param.positiveTerminalInput = COMP_D_INPUT2;
    param.negativeTerminalInput = COMP_D_VREF;
    param.outputFilterEnableAndDelayLevel = COMP_D_FILTEROUTPUT_OFF;
    param.invertedOutputPolarity = COMP_D_NORMALOUTPUTPOLARITY;
    Comp_D_init(COMP_D_BASE, &param);
 
    //Set the reference voltage that is being supplied to the (-) terminal
    /* Base Address of Comparator D,
     * Reference Voltage of Vcc V,
     * Lower Limit of Vcc*(16/32) = Vcc*1/2,
     * Upper Limit of Vcc*(8/32) = Vcc*1/4,
     * Static Mode Accuracy
     */
    Comp_D_setReferenceVoltage(COMP_D_BASE,
        COMP_D_REFERENCE_AMPLIFIER_DISABLED,
        8,
        16
        );
 
    //Disable Input Buffer on P1.2/CD2
    /* Base Address of Comparator D,
     * Input Buffer port
     * Selecting the CDx input pin to the comparator
     * multiplexer with the CDx bits automatically
     * disables output driver and input buffer for
     * that pin, regardless of the state of the
     * associated CDPD.x bit
     */
      Comp_D_disableInputBuffer(COMP_D_BASE,
          COMP_D_INPUT2);
 
    //Allow power to Comparator module
    Comp_D_enable(COMP_D_BASE);
 
  __delay_cycles(400);           // delay for the reference to settle
 
  __bis_SR_register(LPM4_bits);             // Enter LPM4
  __no_operation();                         // For debug
}